This invention relates to a circuit for multiplexing a large number of control signals.
Where a large number of control signals are processed as in an electronic musical instrument, a circuit for multiplexing a large number of control signals by time division is generally applied in order to decrease a number of control circuits and that of lines. Further, it sometimes happens that during the multiplexing process, a single control signal is converted into a plurality of control pulses.
The prior art control signal-multiplexing circuit has an arrangement as shown in FIG. 1. Control signals CH.sub.l to CH.sub.n of a plurality of channels are conducted to the corresponding latch circuits 10.sub.l to 10.sub.n to be latched therein in a prescribed timing. These latch circuits 10.sub.l to 10.sub.n have a function of properly shaping the waveforms of the control signals CH.sub.l to CH.sub.n. Where the control signals CH.sub.l to CH.sub.n have their waveforms properly shaped in advance, then the latch circuits are not required. Output signals from the latch circuits 10.sub.l to 10.sub.n are conducted to the corresponding control signal-converting circuits 12.sub.l to 12.sub.n. The control signal-converting circuits 12.sub.l to 12.sub.n comprise rising pulse-generating circuits 14.sub.l to 14.sub.n for producing rising pulses upon receipt of the output control signals CH.sub.l to CH.sub.n from the latch circuits 10.sub.l to 10.sub.n ; falling pulse-generating circuits 16.sub.l to 16.sub.n for sending forth falling pulses; and state-holding circuits 18.sub.l to 18.sub.n for issuing state-holding pulses. With, for example, an electronic musical instrument, the rising or falling pulses are applied to produce certain musical tones. The state-holding pulses are used to sustain certain musical tones.
Output pulses from the rising pulse generators 14.sub.l to 14.sub.n are conducted to a first multiplexer 20, and then transmitted to a first control line 22 after being multiplexed by selective scanning. Similarly, output pulses from the falling pulse generators 16.sub.l to 16.sub.n are delivered to a second multiplexer 24 and then transmitted to a second control line 26 after being multiplexed by selective scanning. Output pulses from the state-holding circuits 18.sub.l to 18.sub.n are supplied to a third multiplexer and then sent forth to a third control line 30 after being multiplexed by selective scanning.
The rising pulse generators 14.sub.l to 14.sub.n judge at a prescribed interval (for each scanning period of the multiplexer) whether or not the control signals CH.sub.l to CH.sub.n have risen. Where the control signals have risen then the rising pulse generators 14.sub.l to 14.sub.n issued a rising pulse having a width corresponding to one channel period. The falling pulse generators 16.sub.l to 16.sub.n judge at the above-mentioned prescribed interval whether or not the control signals CH.sub.l to CH.sub.n have fallen. Where the control signals have fallen, then the falling pulse generators 16.sub.l to 16.sub.n produce a falling pulse having a width corresponding to the aforementioned one channel period. The state-holding circuits 18.sub.l to 18.sub.n judge in a prescribed timing whether a control signal retains a high or low level. Once a high level is detected, the state-holding circuits 18.sub.l to 18.sub.n cause the high level to be retained, until the state holding circuits 18.sub.l to 18.sub.n are reset.
Where, however, the rising pulse generators 14.sub.l to 14.sub.n, falling pulse generators 16.sub.l to 16.sub.n and state-holding circuits 18.sub.l to 18.sub.n are provided for each channel, then the control signal-converting circuits, multiplexers and signal lines inevitably increase in number, undesirably enlarging a pattern area required for the integration of a circuit. Where a signal for reseting the state-holding circuit is multiplexed, then a demultiplexer has to be provided in order to separate the multiplexed reset signal into a plurality of components and allocate a divided reset pulse component to each channel.